# OptiStick 5 (S905X5M / S7D), UART log, firmware dbg1479 (device-signed u-boot), eFuse NOT burned.
# Captured by Wilber 2026-10-29 on two consecutive power-ons; both identical. This is the second one.
# Scrubbed: chip ID -> <chip-id>. The log starts mid DDR training (start of the UART capture).

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq pinmux det pin 2
ret_r0

ddr read dq window  0000 0000 0000 0076 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 007a 0000 0000 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq pinmux det pin 3
ret_r0

ddr read dq window  0000 0000 0000 0000 0000 0073 0000 0000 0000 0074 0000 0000 0000 0000 0000 0000 0000 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq pinmux det pin 4
ret_r0

ddr read dq window  0000 0000 0072 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq pinmux det pin 5
ret_r0

ddr read dq window  0074 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0073 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq pinmux det pin 6
ret_r0

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0071 0000 0000 0000 0075 0000 0000 0000 0000 0000 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq pinmux det pin 7
ret_r0

ddr read dq window  0000 0070 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0073 0000 0000 0000 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

rd dq pinmux det training result
0 32
1 1
2 4
3 5
4 2
5 7
6 6
7 0
8 3
9 10
10 8
11 14
12 33
13 15
14 9
15 13
16 12
17 11
18 17
19 22
20 34
21 19
22 16
23 18
24 20
25 23
26 21
27 28
28 29
29 35
30 26
31 31
32 25
33 30
34 24
35 27
mrs13,0x000000c8
mrs3,0x00000035
mrs4,0x00000000
mrs11,0x00000025
mrs12,0x00000066
mrs16,0x00000000
mrs17,0x00000000
mrs14,0x00000048
mrs22,0x0000001e
mrs23,0x00000040
mrs1,0x00000054
mrs2,0x0000002d
mrs32,0x00000055
mrs40,0x00000055
mrs15,0x00000000
mrs20,0x00000000
rd dq training
ret_r0

ddr read dq window  0073 0078 0079 0075 0075 0075 0072 0070 0000 0076 0076 0079 0074 007b 0075 0073 0075 0000

ret_r1

ddr read dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

ret_r0

ret_r1

ret_r0

ret_r1

write leveling training
ret_r0

ddr write leveling  007f 0091
ret_r1

ddr write leveling (warning 0006  01bf) 0080(warning 0007  01bf) 0080
tdqs2dq=226
write dq training
ret_r0

ddr write dq window  0076 0076 0073 0075 0078 0079 0078 0077 007b 007b 0079 007b 007a 0078 0079 007b 0078 0000
ret_r1

ddr write dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
ret_r0

ret_r1

user cmd dram vref 0x00000045,permil=240 /1000 *vddq
user cmd dram vref 0x00000048,permil=252 /1000 *vddq
write dq training
w_dq_coarse  0000007c 00000079 00000077 0000007a 00000000 00000000 00000000 00000000
write dq training
w_dq_coarse  0000007c 00000079 00000077 00000079 00000000 00000000 00000000 00000000
write dq training
w_dq_coarse  0000007c 00000079 00000077 0000007a 00000000 00000000 00000000 00000000
write dq training
w_dq_coarse  0000007c 00000079 00000077 00000077 00000000 00000000 00000000 00000000index 2 sub_index 0 phase 172
index 2 sub_index 1 phase 156
index 2 sub_index 2 phase 127
index 2 sub_index 3 phase 145
index 2 sub_index 4 phase 128
index 2 sub_index 5 phase 128
index 2 sub_index 6 phase 128
index 2 sub_index 7 phase 128

user cmd dram vref 0x00000048,permil=252 /1000 *vddq
write dq training
ret_r0

ddr write dq window  0077 0077 0072 0074 0079 0079 0077 0077 0079 0079 0079 007a 007a 0079 007b 0079 0079 0000
ret_r1

ddr write dq window  0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
ret_r0

ret_r1

user cmd dram vref 0x00000045,permil=240 /1000 *vddq
user cmd dram vref 0x00000048,permil=252 /1000 *vddqddr boot cost time 256382
2d-eye soc_vref ddr 0,ch 0 0017 0018 0018 0017 0017 0018 0019 0018 0016 0016 0017 0017 0016 0018 0016 0016 0016 0016 0020 0016 0017 0018 0017 0018 0015 0018 0018 0018 0019 0018 0017 0017 average_value_dec 0017 0187 mv
2d-eye dram_vref data 0x0048 0277 mv ac 0x0066 0409 mv
2d-eye soc_vref ddr 0,ch 1 0023 0024 0024 0023 0023 0024 0025 0024 0022 0022 0023 0023 0022 0024 0022 0022 0022 0022 0026 0022 0023 0024 0023 0024 0021 0024 0024 0024 0025 0024 0023 0023 average_value_dec 0023 0253 mv
2d-eye dram_vref data 0x0048 0277 mv ac 0x0066 0409 mv
org 5,0x0000ffff n 5,0x000000ff
org 8,0x00000808 n 8,0x00000008
org 8,0x00000808 n 8,0x00000008auto size-- 7680
org 8,0x00000808 n 8,0x00000008
org 8,0x00000808 n 8,0x00000008
CS0 size: 1024MB
DMC_DDR_CTRL: 0x02d10155
Total size: 1024MB @ 1584MHz
DDR : 1024MB @1584MHz



org 4,0x00000101 n 4,0x00000001
non-sec scramble use random key
scramble key_1 always use random key
ddr scramble enabled

dram_size_cfg =00000022
dram_cs0_size_MB_ch=00000400
dram_cs1_size_MB_ch=00000000
ddr_efuse_info[0]=00000000 [1]=00000000

ddr_refresh_offset=0x00000097 00000000
exit ddr boot

dram_total_size_MB =1024M

INFO: bl2_load_bl2ex start!

open all dmc permission
INFO: load ...
Load: BL2E From: eMMC - 3.2 src: 00002000, dst: 00fffff0, size: 00019000
off:00046200
sdemmc src: INFO: check ...
SHA CHK OK!

aml log : dump from buffer 01000000
5f 88 c6 dd 88 cc 6d 85 29 62 60 92 c3 5d 57 10
2f 6c d4 b8 45 aa 69 86 35 11 d1 a5 53 97 ad c3

INFO: load ...
Load: BL2X From: eMMC - 3.2 src: 00000000, dst: 007ffff0, size: 00019000
off:00061200
sdemmc src: INFO: check ...
SHA CHK OK!

aml log : dump from buffer 00800000
f4 af 7a 48 b8 ac 92 6d 75 cc fe 29 52 e1 f6 76
54 4e dc 2f ff bb ea 24 04 f9 b7 64 c5 f8 53 bc

run into bl2e
start:  BL2E stage from BL2 !
info: get valid params from BL2 !
bl2_gd_init
BL2E: do things as vendor specific ...
Hello world, now in BL2E

TE: 668176

BL2E 1.0.0 Built : 09:00:53, Mar 11 2025. s7d projects/amlogic-dev g9fe78db - bl.autobuild@walle02-sh


Start to do bl2e platform setup!
eMMC boot @ 2
sw-hs2 s
tun-w: s=3, sz=4
sw8 s
aml log : BL2E load BL3X.....

TE: 673147
Load: FIP HDR From: eMMC - 3.2 src: 00000000, des: 00308000, size: 00002000
off:000bc200
Load: BL3X From: eMMC - 3.2 src: 00002000, des: 0030a000, size: 0026c260
off:000be200
aml log : BL2E loading BL3X is done...!
boot bl2x
params to bl2x, address=0x0100e3c0


 Hello, we are in BL2X world !

TE: 717904

BL2X 1.1.0 Built : 07:10:10, Feb 10 2025. s7d projects/amlogic-dev g64bb619 - bl.autobuild@walle02-sh

bl2_platform_setup

ampk: no key in acs
INFO: get valid list_blobinfo, 0x0100e3c0

Loading secpu fw
Run secpu ... Fails to send 1st packet to secpu.(0xfffffff9)
Error: AML_ERROR_TIMEOUT
Fails to boot secpu rom.(0xfffffff9)
Fails to run secpu(0xfffffff9)
bl2e_2 entry: 010000c4
run into bl31
NOTICE:  BL31: start aocpu
NOTICE:  BL31: v2.7.2(release):s7_s7d_s6_nsv_11262024-30-g0874d7849 bl.autobuild@walle02-sh
NOTICE:  BL31: Built : 15:47:45, Mar 17 2026
[BL31] mbox init
NOTICE:  BL31:tsensor calibration: tsensor1 = 860000ac
NOTICE:  DEVICE_MVN=0x0
NOTICE:  ignore fixed_pll clock init
NOTICE:  vmin:34 d9 6 0!
NOTICE:  vmin:34 d9 6 0!
NOTICE:  decomp BL32 is Success
E/TC:0 00 INFO:    BL3-2: ATOS-V3.18.4-67066ff8a-bl.autobuild@walle02-sh (gcc version 13.3.1 20240614 (Arm GNU Toolchain 13.3.Rel1 (Build arm-13.24))) #1 Fri Feb  6 06:28:53 UTC 2026 aarch64

E/TC:0 00 INFO:    BL3-2: Chip: S7D Rev: B (47:B - 0:1)

E/TC:0 00 INFO:    BL3-2: Secure Timer Initialized.

E/TC:0 00 ampk_init:143 ampk: read vendor_key failed, res = 0xffff000b

NOTICE:  decomp BL33 is Success
bl2e stage2 enable mmu
boot bl33 ! TE:905394

S7D:BL:483268;ID:<chip-id>;FEAT:30F:10000:B002F:19;POC:FF;RCY:0;OVD:0;DFU:0;NAND:306;SPINAND:2FF;SD:2002;USB:ADFU
S7D:BL:483268;ID:<chip-id>;FEAT:30F:10000:B002F:19;POC:FF;RCY:0;OVD:0;DFU:1;USB:0;RD-0:0:0;